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International Journal of Advanced Computer Research (IJACR)

ISSN (Print):2249-7277    ISSN (Online):2277-7970
Volume-3 Issue-10 June-2013
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Paper Title : An Auto ranging Data Converter Implementation in FPGA
Author Name : Jithin Krishnan, Sreekumari B, Jiju K
Abstract :

A novel project is being presented here for implementation an auto ranging analog to digital converter for biomedical applications completely inside an FPGA - i.e. an all-digital analog to digital (A/D) converter system. The only analog part is the auto ranging circuitry and an RC Integrator outside FPGA. The system outputs 24 bits and features a sigma delta ADC of 16 bits resolution, a range detection unit with 7 bits and a sign bit for polarity detection. The analog part of the modulator is done utilizing the LVDS transceiver in the FPGA making it a real digital one. The digital section of sigma delta ADC containing the decimation filter banks is done in a cascaded filter structure form including a CIC decimation filter, droop compensation and half-band filters. The top level module was coded using VHDL and the simulation was carried out with ModelSim and MATLAB.

Keywords : Autoranging ADC, Sigma Delta ADC, Digital filter section, 16 bit ADC.
Cite this article : Jithin Krishnan, Sreekumari B, Jiju K, " An Auto ranging Data Converter Implementation in FPGA " , International Journal of Advanced Computer Research (IJACR), Volume-3, Issue-10, June-2013 ,pp.56-60.