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International Journal of Advanced Computer Research (IJACR)

ISSN (Print):2249-7277    ISSN (Online):2277-7970
Volume-5 Issue-18 March-2015
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Paper Title : Design of reversible binary logarithmic multiplier and divider using optimal garbage
Author Name : Arindam Banerjee, Samayita Sarkar, Mainuck Das and Aniruddha Ghosh
Abstract :

Energy efficient test-able binary logarithmic multiplier and divider architecture using reversible logic has been reported in this paper. The focus of this paper is to avoid multiplication and division stages to reduce large layout area and make the circuit efficiently test-able. Here all the computations have been performed in radix-2 basis. Moreover to avoid the usage of large number of constant inputs, an efficient technique has been adopted. Though the procedure demands errors in the result, efforts have been made to achieve higher accuracy.

Keywords : Logarithm, Antilogarithm, Addition, Subtraction, Logical Reversibility.
Cite this article : Arindam Banerjee, Samayita Sarkar, Mainuck Das and Aniruddha Ghosh, " Design of reversible binary logarithmic multiplier and divider using optimal garbage " , International Journal of Advanced Computer Research (IJACR), Volume-5, Issue-18, March-2015 ,pp.1-10.