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International Journal of Advanced Technology and Engineering Exploration (IJATEE)

ISSN (Print):2394-5443    ISSN (Online):2394-7454
Volume-8 Issue-75 February-2021
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Paper Title : Electronic combination lock system using verilog HDL
Author Name : Nadia Mohamad Nasir, Irni Hamiza Hamzah, Azman Ab Malik, Mohd Hanapiah Abdullah, Alhan Farhanah Abd Rahim and Ahmad Asri ABD Samat
Abstract :

Recently, burglary and robbery cases has been increasing and one of the factors that contributes to the growth of these cases is the weakness on the old-style home security system. The old-fashioned key and lock system may bring challenges to the effectiveness of the system since the keys are exposed to the risks of being lost and duplicated. The advancement of technology has introduced an electronic combination lock system in which only the house owner and selected people can unlock the doors. A main goal of this paper is to design and develop an electronic combination lock system using Verilog code. The entrance door of a house will only unlock if the user slides the correct secret code on the slide switches of the Altera DE2-115 Trainer Board. A Verilog code of the keyless system had been designed and scripted in Intel Quartus Prime Software. The simulations via testbench waveforms are performed in ModelSim Software. When the system detected the entered code matched with the setting code, the door is going to unlock. Besides, when the system detected the entered code did not match the setting code, the door is still unlocked. When the user entered correct password, all green LEDs turned on and the LCD displayed “Welcome Home”. Besides, when the user entered an incorrect password, all red LEDs turned on and the LCD displayed “Wrong Password”. The output displayed are successfully demonstrated on the Altera DE2-115 Trainer Board according to the desired results.
Keywords : Home security system, Keyless lock system, Field programmable gate arrays (FPGA), Hardware description language (HDL).
Cite this article : Nasir NM, Hamzah IH, Malik AA, Abdullah MH, Rahim AF, Samat AA. Electronic combination lock system using verilog HDL. International Journal of Advanced Technology and Engineering Exploration. 2021; 8(75):328-337. DOI:10.19101/IJATEE.2020.762169.
References :
[1]Li W, Li H, Gong A, Ou Y, Li M. An intelligent electronic lock for remote-control system based on the internet of things. In journal of physics: conference series 2018 (pp.1-7). IOP Publishing.
[Crossref] [Google Scholar]
[2]Yeap KH. Design of a keyless coded home lock system using Verilog hardware description language. International Journal of Electronics, Computer and Communications Technologies. 2012; 3(1):10-16.
[Google Scholar]
[3]Schiefer M. Smart home definition and security threats. In ninth international conference on IT security incident management & IT forensics 2015 (pp. 114-8). IEEE.
[Crossref] [Google Scholar]
[4]Jadaa KJ, Kamarudin LM, Ahmad RB, Hussein WN. Multi objects detection and tracking system for smart home using wireless sensor network. International Journal of Advanced Trends in Computer Science and Engineering. 2019; 8(5):2434-41.
[Crossref] [Google Scholar]
[5]Arabahmadi R. A reversible fluorescence “ON–OFF–ON” sensor for sequential detection of F− and Cu2+ ions and its application as a molecular-scale logic device and security keypad lock. Journal of Coordination Chemistry. 2019; 72(5-7):1187-202.
[Crossref] [Google Scholar]
[6]Saleh SB, Mazlan SB, Hamzah NI, Karim AZ, Zainal MS, Hamzah SA, et al. Smart home security access system using field programmable gate arrays. Indonesian Journal of Electrical Engineering and Computer Science. 2018; 11(1):152-60.
[Crossref] [Google Scholar]
[7]Ha I. Security and usability improvement on a digital door lock system based on internet of things. International Journal of Security and its Applications. 2015; 9(8):45-54.
[Google Scholar]
[8]Anitha A. Home security system using internet of things. In IOP conference series: materials science and engineering 2017 (p. 042026). IOP Publishing.
[Google Scholar]
[9]Lawan MB, Tijjani I. Microcontroller based electronic digital lock with security notification. Journal of Engineering Research and Reports. 2018:1-3.
[Crossref] [Google Scholar]
[10]Yang CH, Huang SJ. Secure color image encryption algorithm based on chaotic signals and its FPGA realization. International journal of Circuit Theory and Applications. 2018; 46(12):2444-61.
[Crossref] [Google Scholar]
[11]Zhou R, Briones J, Morehouse T. PUF Implementation and application for securing IoT devices. In IEEE 63rd international Midwest symposium on circuits and systems (MWSCAS) 2020 (pp. 221-4). IEEE.
[Crossref] [Google Scholar]
[12]Ercan T, Al Azzawi AK. Design of an FPGA-based intelligent gateway for industrial IoT. International Journal of Advanced Trends in Computer Science and Engineering. 2019; 8(1-2):126-30.
[Crossref] [Google Scholar]
[13]Wang MS, Zhang ZR. FPGA implementation of HOG based multi-scale pedestrian detection. In international conference on applied system invention (ICASI) 2018 (pp. 1099-102). IEEE.
[Crossref] [Google Scholar]
[14]Schkufza E, Wei M, Rossbach CJ. Just-in-time compilation for verilog. In Architectural Support for Programming Languages and Operating Systems 2019:1-13.
[Google Scholar]
[15]Karunanayake N, Gnanasekera M, Kodikara N. A robust algorithm for retinal blood vessel extraction. International Journal of Innovative Research in Computer and Communication Engineering. 2015; 3(9):7921-9.
[Crossref] [Google Scholar]
[16]Rana KP, Kumar V, Mittra N, Pramanik N. Implementation of fractional order integrator/differentiator on field programmable gate array. Alexandria Engineering Journal. 2016; 55(2):1765-73.
[Crossref] [Google Scholar]
[17]Adiono T, Prakoso KS, Putratama CD, Yuwono B, Fuada S. HOG-AdaBoost implementation for human detection employing FPGA ALTERA DE2-115. International Journal of Advanced Computer Science and Applications. 2018; 9(10):353-8.
[Google Scholar]
[18]Rodríguez-Andina JJ, Valdes-Pena MD, Moure MJ. Advanced features and industrial applications of FPGAs—a review. IEEE Transactions on Industrial Informatics. 2015; 11(4):853-64.
[Crossref] [Google Scholar]
[19]Rao, S. V. R. K., Srujana, G., Priyanka, B., Nanda, R. Effective analysis of human facial appearance using JAFFE images. International Journal of Advanced Trends in Computer Science and Engineering. 2018; 7(6):149-151.
[Crossref]
[20]Narula MS, Singla N. FPGA implementation of image enhancement using verilog HDL. International Research Journal of Engineering and Technology (IRJET). 2018; 5(5):1794-7.
[Google Scholar]
[21]Chiuchisan I, Cerlinca M, Potorac AD, Graur A. Image enhancement methods approach using verilog hardware description language. In11th international conference on development and application systems 2012 (pp. 144-8).
[Google Scholar]
[22]Young S, Demmings A, Ivari NE, Legault JP, Kent KB. Verilog loop unrolling, module generation, part-select and arithmetic right shift support in odin II. In proceedings of the 30th international workshop on rapid system prototyping (RSP19) 2019 (pp. 71-4).
[Crossref] [Google Scholar]
[23]Larios DF, Barbancho J, Biscarri F, Monedero I. A research study for the design of a portable and configurable ground test system for the A400M Aircraft. International Journal of Aerospace Engineering. 2019; 2019:1-16.
[Crossref] [Google Scholar]
[24]Hamzah IH, Suhaimi MS, Malik AA, Rahim AF. Design and implementation of HDL remote controller for smart home system. Indonesian Journal of Electrical Engineering and Computer Science. 2020; 20(1):117-24.
[Crossref] [Google Scholar]